{"title":"热电能量收集电容式DC-DC变换器的栅极电压优化","authors":"Y. Tan, Y. Shiiki, H. Ishikuro","doi":"10.1145/3394885.3431654","DOIUrl":null,"url":null,"abstract":"This paper presents a gate voltage optimized fully integrated charge pump for thermoelectric energy harvesting applications. In this paper, the trade-off generated by rising the gate voltage of switching transistors are discussed. The proposed 5/3-stage design, which implemented with 180 nm CMOS technique, achieved a down to 0.12V/0.13V startup voltage correspondingly with the proposed technique. A 20% peak power conversion efficiency improvement is achieved when comparing with a similar 3-stage linear charge pump in previous state-of-the-art research.","PeriodicalId":186307,"journal":{"name":"2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC)","volume":"16 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-01-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Gate Voltage Optimization in Capacitive DC-DC Converters for Thermoelectric Energy Harvesting\",\"authors\":\"Y. Tan, Y. Shiiki, H. Ishikuro\",\"doi\":\"10.1145/3394885.3431654\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a gate voltage optimized fully integrated charge pump for thermoelectric energy harvesting applications. In this paper, the trade-off generated by rising the gate voltage of switching transistors are discussed. The proposed 5/3-stage design, which implemented with 180 nm CMOS technique, achieved a down to 0.12V/0.13V startup voltage correspondingly with the proposed technique. A 20% peak power conversion efficiency improvement is achieved when comparing with a similar 3-stage linear charge pump in previous state-of-the-art research.\",\"PeriodicalId\":186307,\"journal\":{\"name\":\"2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC)\",\"volume\":\"16 4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-01-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/3394885.3431654\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3394885.3431654","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Gate Voltage Optimization in Capacitive DC-DC Converters for Thermoelectric Energy Harvesting
This paper presents a gate voltage optimized fully integrated charge pump for thermoelectric energy harvesting applications. In this paper, the trade-off generated by rising the gate voltage of switching transistors are discussed. The proposed 5/3-stage design, which implemented with 180 nm CMOS technique, achieved a down to 0.12V/0.13V startup voltage correspondingly with the proposed technique. A 20% peak power conversion efficiency improvement is achieved when comparing with a similar 3-stage linear charge pump in previous state-of-the-art research.