{"title":"3Gb/s单片集成光电二极管和前置放大器,标准0.18/spl mu/m CMOS","authors":"S. Radovanovic, A. Annema, B. Nauta","doi":"10.1109/ISSCC.2004.1332799","DOIUrl":null,"url":null,"abstract":"A 3 Gb/s optical detector with integrated photodiode and pre-amplifier for 850 nm light is presented. The IC is implemented in standard 0.18 /spl mu/m CMOS. The data rate is achieved by using an inherently robust analog equalizer without sacrificing responsivity.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"3Gb/s monolithically integrated photodiode and pre-amplifier in standard 0.18/spl mu/m CMOS\",\"authors\":\"S. Radovanovic, A. Annema, B. Nauta\",\"doi\":\"10.1109/ISSCC.2004.1332799\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 3 Gb/s optical detector with integrated photodiode and pre-amplifier for 850 nm light is presented. The IC is implemented in standard 0.18 /spl mu/m CMOS. The data rate is achieved by using an inherently robust analog equalizer without sacrificing responsivity.\",\"PeriodicalId\":273317,\"journal\":{\"name\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2004.1332799\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2004.1332799","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
3Gb/s monolithically integrated photodiode and pre-amplifier in standard 0.18/spl mu/m CMOS
A 3 Gb/s optical detector with integrated photodiode and pre-amplifier for 850 nm light is presented. The IC is implemented in standard 0.18 /spl mu/m CMOS. The data rate is achieved by using an inherently robust analog equalizer without sacrificing responsivity.