受限物联网的动态时钟重构及其在节能网络中的应用

Michel Rottleuthner, T. Schmidt, Matthias Wählisch
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引用次数: 3

摘要

时钟配置在调整受限的通用微控制器的性能、定时精度和能源效率方面起着关键作用。然而,配置底层时钟树涉及具有复杂依赖关系和动态约束的大型参数空间。我们认为时钟配置是一种通用的操作系统模块,它可以在高度可配置但复杂的嵌入式硬件和简单的应用程序开发之间架起桥梁。在本文中,我们提出了一种基于受限物联网(IoT)设备的动态时钟重构方法和运行时子系统ScaleClock。ScaleClock通过抽象特定于硬件的时钟树派生出动态优化时钟配置的方法。ScaleClock系统服务允许对应用程序动态时钟缩放的优化潜力进行便携式访问。我们针对不同厂商的两个目标平台,在流行的IoT操作系统RIOT上实现了该方法,并在真实设备上评估了其静态和动态场景下的性能。我们通过设计一种与平台无关的动态电压和频率缩放(DVFS)机制来展示ScaleClock的潜力,该机制使RIOT能够自主地调整硬件性能以适应当前执行的软件的要求。在一个用例研究中,我们设法通过在性能影响可以忽略不计的情况下将MCU消耗降低40%来提高受限网络通信的能源效率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Dynamic Clock Reconfiguration for the Constrained IoT and its Application to Energy-efficient Networking
Clock configuration takes a key role in tuning constrained general-purpose microcontrollers for performance, timing accuracy, and energy efficiency. Configuring the underlying clock tree, however, involves a large parameter space with complex dependencies and dynamic constraints. We argue for clock configuration as a generic operating system module that bridges the gap between highly configurable but complex embedded hardware and easy application development. In this paper, we propose a method and a runtime subsystem for dynamic clock reconfiguration on constrained Internet of Things (IoT) devices named ScaleClock. ScaleClock derives measures to dynamically optimize clock configurations by abstracting the hardware-specific clock trees. The ScaleClock system service grants portable access to the optimization potential of dynamic clock scaling for applications. We implement the approach on the popular IoT operating system RIOT for two target platforms of different manufacturers and evaluate its performance in static and dynamic scenarios on real devices. We demonstrate the potential of ScaleClock by designing a platform-independent dynamic voltage and frequency scaling (DVFS) mechanism that enables RIOT to autonomously adapt the hardware performance to requirements of the software currently executed. In a use case study, we manage to boost energy efficiency of constrained network communication by reducing the MCU consumption by 40 % at negligible performance impact.
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