Fault tolerance analysis of MEMS holographic memory for DORGAs

Demand for fast dynamic reconfiguration has increased since dynamic reconfiguration can accelerate the performance of implementation circuits on its programmable gate array. Such dynamic reconfiguration is dependent upon two important features: fast reconfiguration and numerous contexts. However, fast reconfiguration and numerous contexts share a tradeoff relation on current VLSIs. Therefore, optically recon-figurable gate arrays (ORGAs) have been developed to resolve this dilemma. Among studies of such devices, this paper presents a demonstration of a dynamic ORGA (DORGA) with a MEMS holographic memory and its fault tolerance analysis results.