Design of Global Interconnects using Adiabatic Dynamic Logic employing FinFET Technology

CMOS technology has been dominating VLSI design for a few decades. Although, it provides high speed and packing density, there also arises the problem of short channel effects as we scale down the technology size. Also, with the decrease in technology size, power consumption issues have started to dominate which further increases as the technology reaches to deep sub-micron level. This is one of the factors which provide a cause to switch to advanced technologies like FinFETs. FinFETs are used to reduce leakage currents but also proves to be a promising technology in terms of power consumption. In this paper, digital inverters are presented using MOSFET technology and FinFET technology. Further, the inverter circuits are implemented using adiabatic dynamic logic to conserve power consumption. These inverter circuits are inserted in between the interconnect circuits as an application. The circuits are implemented using 45nm technology with the input supply of 1V. The proposed interconnect circuit using ADL CMOS inverter using FinFET technology shows 62% decrease in power consumption as compared to the interconnect circuit using ADL Schmitt trigger circuit.