{"title":"硅化工艺要求的硼磷硅酸盐玻璃回流退火热收支调整","authors":"U. Hashim, B. Y. Majlis, S. Shaari","doi":"10.1109/SMELEC.1998.781179","DOIUrl":null,"url":null,"abstract":"Three process sequences of borophosphosilicate glass (BPSG) reflow have been tested and characterized. A combination of a CVD furnace and rapid thermal annealing has been used to see the impact on the BPSG reflow. Results obtained showed that the RTA process has the potential to compensate for the reduction of the CVD furnace process temperature. SEM micrographs have shown that the new BPSG process sequence exhibits similar glass flow characteristics to the conventional BPSG reflow process. On the other hand, rapid thermal annealing alone is not adequate to completely flow the glass.","PeriodicalId":356206,"journal":{"name":"ICSE'98. 1998 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.98EX187)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Thermal budget adjustment of borophosphosilicate glass reflow-anneal for silicide process requirement\",\"authors\":\"U. Hashim, B. Y. Majlis, S. Shaari\",\"doi\":\"10.1109/SMELEC.1998.781179\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Three process sequences of borophosphosilicate glass (BPSG) reflow have been tested and characterized. A combination of a CVD furnace and rapid thermal annealing has been used to see the impact on the BPSG reflow. Results obtained showed that the RTA process has the potential to compensate for the reduction of the CVD furnace process temperature. SEM micrographs have shown that the new BPSG process sequence exhibits similar glass flow characteristics to the conventional BPSG reflow process. On the other hand, rapid thermal annealing alone is not adequate to completely flow the glass.\",\"PeriodicalId\":356206,\"journal\":{\"name\":\"ICSE'98. 1998 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.98EX187)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-11-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ICSE'98. 1998 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.98EX187)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMELEC.1998.781179\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICSE'98. 1998 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.98EX187)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.1998.781179","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Thermal budget adjustment of borophosphosilicate glass reflow-anneal for silicide process requirement
Three process sequences of borophosphosilicate glass (BPSG) reflow have been tested and characterized. A combination of a CVD furnace and rapid thermal annealing has been used to see the impact on the BPSG reflow. Results obtained showed that the RTA process has the potential to compensate for the reduction of the CVD furnace process temperature. SEM micrographs have shown that the new BPSG process sequence exhibits similar glass flow characteristics to the conventional BPSG reflow process. On the other hand, rapid thermal annealing alone is not adequate to completely flow the glass.