The future of semiconductors; Moore or less

Scaling results in: increasing design productivity gap; increasing mask costs; increasing leakage currents; increasing noise while noise margins reduce; increasing test costs; increasing technology costs due to approaching the limits. Design measures to limit leakage and noise and to support testing and debug, require an increasing number of transistors (up to 20-40%) and more complex processes to support embedded options. The move to the next technology will become less and less commercially attractive.