{"title":"面向移动计算的GPU架构优化","authors":"A. Aldahlawi, Yang-Bin Kim, Kyung Ki Kim","doi":"10.1109/ISOCC47750.2019.9027715","DOIUrl":null,"url":null,"abstract":"Graphical Processing Units (GPUs) are always criticized for high power consumption due to its massive performance that it can deliver. While GPUs are getting into the mobile market, more power constraints are established. In this work, we evaluate the power gating techniques for GPU cache arrays. The leakage power in active mode is measured at 2.28 µW whereas is sleep mode leakage power is measured at 0.61 µW (26.7% of active mode leakage) and 0.034 µW at off mode (1.5% of active mode leakage) at 1.0V power supply using 45nm standard CMOS process.","PeriodicalId":113802,"journal":{"name":"2019 International SoC Design Conference (ISOCC)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"GPU Architecture Optimization For Mobile Computing\",\"authors\":\"A. Aldahlawi, Yang-Bin Kim, Kyung Ki Kim\",\"doi\":\"10.1109/ISOCC47750.2019.9027715\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Graphical Processing Units (GPUs) are always criticized for high power consumption due to its massive performance that it can deliver. While GPUs are getting into the mobile market, more power constraints are established. In this work, we evaluate the power gating techniques for GPU cache arrays. The leakage power in active mode is measured at 2.28 µW whereas is sleep mode leakage power is measured at 0.61 µW (26.7% of active mode leakage) and 0.034 µW at off mode (1.5% of active mode leakage) at 1.0V power supply using 45nm standard CMOS process.\",\"PeriodicalId\":113802,\"journal\":{\"name\":\"2019 International SoC Design Conference (ISOCC)\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 International SoC Design Conference (ISOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISOCC47750.2019.9027715\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC47750.2019.9027715","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
GPU Architecture Optimization For Mobile Computing
Graphical Processing Units (GPUs) are always criticized for high power consumption due to its massive performance that it can deliver. While GPUs are getting into the mobile market, more power constraints are established. In this work, we evaluate the power gating techniques for GPU cache arrays. The leakage power in active mode is measured at 2.28 µW whereas is sleep mode leakage power is measured at 0.61 µW (26.7% of active mode leakage) and 0.034 µW at off mode (1.5% of active mode leakage) at 1.0V power supply using 45nm standard CMOS process.