{"title":"具有参数公差的线性模拟电路的形式化验证方法","authors":"L. Hedrich, E. Barke","doi":"10.1109/DATE.1998.655927","DOIUrl":null,"url":null,"abstract":"This paper presents an approach to formal verification of linear analog circuits with parameter tolerances. The method proves that an actual circuit fulfils a specification in a given frequency interval for all parameter variations. It is based on a curvature driven bound computation for value sets using interval arithmetic. Some examples demonstrate the feasibility of this approach.","PeriodicalId":179207,"journal":{"name":"Proceedings Design, Automation and Test in Europe","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"40","resultStr":"{\"title\":\"A formal approach to verification of linear analog circuits with parameter tolerances\",\"authors\":\"L. Hedrich, E. Barke\",\"doi\":\"10.1109/DATE.1998.655927\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an approach to formal verification of linear analog circuits with parameter tolerances. The method proves that an actual circuit fulfils a specification in a given frequency interval for all parameter variations. It is based on a curvature driven bound computation for value sets using interval arithmetic. Some examples demonstrate the feasibility of this approach.\",\"PeriodicalId\":179207,\"journal\":{\"name\":\"Proceedings Design, Automation and Test in Europe\",\"volume\":\"107 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-02-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"40\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Design, Automation and Test in Europe\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DATE.1998.655927\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Design, Automation and Test in Europe","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DATE.1998.655927","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A formal approach to verification of linear analog circuits with parameter tolerances
This paper presents an approach to formal verification of linear analog circuits with parameter tolerances. The method proves that an actual circuit fulfils a specification in a given frequency interval for all parameter variations. It is based on a curvature driven bound computation for value sets using interval arithmetic. Some examples demonstrate the feasibility of this approach.
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