{"title":"一种新型可编程增益放大器","authors":"G. O'Donoghue, M. Mallinson, P. Holloway","doi":"10.1109/ASIC.1990.186148","DOIUrl":null,"url":null,"abstract":"A MOSFET input amplifier with variable gain from 0 to 42 dB and fixed bandwidth at all closed-loop gains is described. Designed for a system where phase match at all gains is the dominant design goal, this amplifier adapts its open-loop gain crossover point to keep a constant closed-loop gain. This is done by controlling an active matrix of PMOS input devices which simultaneously achieves the constant phase characteristic and optimizes the noise and offset performance. Eight such amplifiers are implemented on a single chip with more than 100 dB of isolation between each amplifier and a power supply rejection ratio (PSRR) of more than 70 dB from 0 to 30 kHz.<<ETX>>","PeriodicalId":126693,"journal":{"name":"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A novel programmable gain amplifier\",\"authors\":\"G. O'Donoghue, M. Mallinson, P. Holloway\",\"doi\":\"10.1109/ASIC.1990.186148\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A MOSFET input amplifier with variable gain from 0 to 42 dB and fixed bandwidth at all closed-loop gains is described. Designed for a system where phase match at all gains is the dominant design goal, this amplifier adapts its open-loop gain crossover point to keep a constant closed-loop gain. This is done by controlling an active matrix of PMOS input devices which simultaneously achieves the constant phase characteristic and optimizes the noise and offset performance. Eight such amplifiers are implemented on a single chip with more than 100 dB of isolation between each amplifier and a power supply rejection ratio (PSRR) of more than 70 dB from 0 to 30 kHz.<<ETX>>\",\"PeriodicalId\":126693,\"journal\":{\"name\":\"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-09-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1990.186148\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1990.186148","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A MOSFET input amplifier with variable gain from 0 to 42 dB and fixed bandwidth at all closed-loop gains is described. Designed for a system where phase match at all gains is the dominant design goal, this amplifier adapts its open-loop gain crossover point to keep a constant closed-loop gain. This is done by controlling an active matrix of PMOS input devices which simultaneously achieves the constant phase characteristic and optimizes the noise and offset performance. Eight such amplifiers are implemented on a single chip with more than 100 dB of isolation between each amplifier and a power supply rejection ratio (PSRR) of more than 70 dB from 0 to 30 kHz.<>
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