Hadiseh Babazadeh, Arash Esmaili, K. Hadidi, A. Khoei
{"title":"宽范围可编程占空比校正器(DCC)","authors":"Hadiseh Babazadeh, Arash Esmaili, K. Hadidi, A. Khoei","doi":"10.1109/IRANIANCEE.2013.6599655","DOIUrl":null,"url":null,"abstract":"A very simple, wide range and programmable duty cycle corrector (DCC) is presented. SPICE simulation results show that the frequency range of the input signal is 250MHz to 1.6GHz, the duty cycle range of the input signal is from 30% to 70% and the programmable duty cycle of the output signal is from 30% to 70% in steps of 10%. The power consumption and p-p jitter are 4.9mW and 2.5ps at 1.6 GHz respectively. This circuit is simulated in 0.35um CMOS technology.","PeriodicalId":383315,"journal":{"name":"2013 21st Iranian Conference on Electrical Engineering (ICEE)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A wide-range programmable duty cycle corrector (DCC)\",\"authors\":\"Hadiseh Babazadeh, Arash Esmaili, K. Hadidi, A. Khoei\",\"doi\":\"10.1109/IRANIANCEE.2013.6599655\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A very simple, wide range and programmable duty cycle corrector (DCC) is presented. SPICE simulation results show that the frequency range of the input signal is 250MHz to 1.6GHz, the duty cycle range of the input signal is from 30% to 70% and the programmable duty cycle of the output signal is from 30% to 70% in steps of 10%. The power consumption and p-p jitter are 4.9mW and 2.5ps at 1.6 GHz respectively. This circuit is simulated in 0.35um CMOS technology.\",\"PeriodicalId\":383315,\"journal\":{\"name\":\"2013 21st Iranian Conference on Electrical Engineering (ICEE)\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-05-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 21st Iranian Conference on Electrical Engineering (ICEE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRANIANCEE.2013.6599655\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 21st Iranian Conference on Electrical Engineering (ICEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRANIANCEE.2013.6599655","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A wide-range programmable duty cycle corrector (DCC)
A very simple, wide range and programmable duty cycle corrector (DCC) is presented. SPICE simulation results show that the frequency range of the input signal is 250MHz to 1.6GHz, the duty cycle range of the input signal is from 30% to 70% and the programmable duty cycle of the output signal is from 30% to 70% in steps of 10%. The power consumption and p-p jitter are 4.9mW and 2.5ps at 1.6 GHz respectively. This circuit is simulated in 0.35um CMOS technology.