{"title":"基于fpga的深度卷积神经网络优化方法","authors":"Lilan Wen","doi":"10.1109/CONF-SPML54095.2021.00030","DOIUrl":null,"url":null,"abstract":"With the increasing demand for computing speed and real-time data processing in various fields, deep learning and convolutional neural networks are more and more widely used in the field of computer vision. FPGA-based deep convolutional neural networks (CNN) have been proposed and developed rapidly due to its high parallel processing ability, portability, and low power consumption. To further improve the network efficiency, this paper studies the software acceleration tool Vivado HLS provided by Xilinx, the quantification and pruning of convolution neural network model, which can effectively optimize the network model and accelerate the reasoning process.","PeriodicalId":415094,"journal":{"name":"2021 International Conference on Signal Processing and Machine Learning (CONF-SPML)","volume":"98 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"FPGA-Based Deep Convolutional Neural Network Optimization Method\",\"authors\":\"Lilan Wen\",\"doi\":\"10.1109/CONF-SPML54095.2021.00030\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the increasing demand for computing speed and real-time data processing in various fields, deep learning and convolutional neural networks are more and more widely used in the field of computer vision. FPGA-based deep convolutional neural networks (CNN) have been proposed and developed rapidly due to its high parallel processing ability, portability, and low power consumption. To further improve the network efficiency, this paper studies the software acceleration tool Vivado HLS provided by Xilinx, the quantification and pruning of convolution neural network model, which can effectively optimize the network model and accelerate the reasoning process.\",\"PeriodicalId\":415094,\"journal\":{\"name\":\"2021 International Conference on Signal Processing and Machine Learning (CONF-SPML)\",\"volume\":\"98 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 International Conference on Signal Processing and Machine Learning (CONF-SPML)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CONF-SPML54095.2021.00030\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Conference on Signal Processing and Machine Learning (CONF-SPML)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CONF-SPML54095.2021.00030","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
FPGA-Based Deep Convolutional Neural Network Optimization Method
With the increasing demand for computing speed and real-time data processing in various fields, deep learning and convolutional neural networks are more and more widely used in the field of computer vision. FPGA-based deep convolutional neural networks (CNN) have been proposed and developed rapidly due to its high parallel processing ability, portability, and low power consumption. To further improve the network efficiency, this paper studies the software acceleration tool Vivado HLS provided by Xilinx, the quantification and pruning of convolution neural network model, which can effectively optimize the network model and accelerate the reasoning process.