fpga加速计算的异构GASNet实现

International Conference on Partitioned Global Address Space Programming Models Pub Date : 2014-10-06 DOI:10.1145/2676870.2676885

Ruediger Willenberg, P. Chow

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引用次数: 8

摘要

本文介绍了一种将可重构逻辑(FPGA)组件整合到分区全局地址空间模型中的方法。为此，我们实现了GASNet的异构实现，它支持带有软件和硬件组件的分布式应用程序，并且可以轻松地将内核从软件迁移到硬件。我们给出了一个用例和初步的性能数字。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Heterogeneous GASNet Implementation for FPGA-accelerated Computing

This paper introduces an effort to incorporate reconfigurable logic (FPGA) components into the Partitioned Global Address Space model. For this purpose, we have implemented a heterogeneous implementation of GASNet that supports distributed applications with software and hardware components and easy migration of kernels from software to hardware. We present a use case and preliminary performance numbers.

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International Conference on Partitioned Global Address Space Programming Models

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