Design of an Integrator-Differentiator Block For a Transimpedance Amplifier Using $0.18\mu \mathrm{m}$ Technology

Transimpedance amplifier (TIA) has become an integral part of front-end electronics required for current sensing applications. In this paper, an integrator-differentiator block as an integral part of TIA has been reported using $\pmb{0.18} \mathbf{\mu m}$ technology in standard CMOS N-well process. A tunable pseudo-resistor has been deployed in the proposed TIA architecture to obtain a variable gain and bandwidth of interest. The reported work also discusses the problem of saturation and clock feed-through present in the integrator block. The simulated gain and noise plots for the integrator-differentiator blocks are also presented in this work. Research effort put forth in this way in implementing the TIA may be helpful for efficient current recording and detection.