非对称自级联码p沟道全耗尽SOI晶体管的模拟性能

2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS) Pub Date : 2012-03-14 DOI:10.1109/ICCDCS.2012.6188932

M. de Souza, M. Pavanello, D. Flandre

{"title":"非对称自级联码p沟道全耗尽SOI晶体管的模拟性能","authors":"M. de Souza, M. Pavanello, D. Flandre","doi":"10.1109/ICCDCS.2012.6188932","DOIUrl":null,"url":null,"abstract":"This work presents an analysis of the analog performance of asymmetric threshold voltage self-cascode fully depleted (FD) p-type SOI transistors. The experimental results showed that this structure is able to improve the devices transconductance and output conductance, resulting in increased intrinsic voltage gain and breakdown voltage in comparison to single transistors and the conventional symmetric self-cascode.","PeriodicalId":125743,"journal":{"name":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Analog performance of asymmetric self-cascode p-channel fully depleted SOI transistors\",\"authors\":\"M. de Souza, M. Pavanello, D. Flandre\",\"doi\":\"10.1109/ICCDCS.2012.6188932\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents an analysis of the analog performance of asymmetric threshold voltage self-cascode fully depleted (FD) p-type SOI transistors. The experimental results showed that this structure is able to improve the devices transconductance and output conductance, resulting in increased intrinsic voltage gain and breakdown voltage in comparison to single transistors and the conventional symmetric self-cascode.\",\"PeriodicalId\":125743,\"journal\":{\"name\":\"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-03-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCDCS.2012.6188932\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCDCS.2012.6188932","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 11

摘要

本文分析了非对称阈值电压自级联码完全耗尽(FD) p型SOI晶体管的模拟性能。实验结果表明，与单晶体管和传统的对称自级联码相比，该结构能够改善器件的跨导和输出导，从而提高固有电压增益和击穿电压。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Analog performance of asymmetric self-cascode p-channel fully depleted SOI transistors

This work presents an analysis of the analog performance of asymmetric threshold voltage self-cascode fully depleted (FD) p-type SOI transistors. The experimental results showed that this structure is able to improve the devices transconductance and output conductance, resulting in increased intrinsic voltage gain and breakdown voltage in comparison to single transistors and the conventional symmetric self-cascode.

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2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)

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