Area and Power Efficient Implementation of db4 Wavelet Filter Banks for ECG Applications Using Reconfigurable Multiplier Blocks

There is an increasing demand for wavelet-based real-time on-node signal processing in portable medical devices which raises the need for reduced hardware size, cost and power consumption. This paper presents an improved Reconfigurable Multiplier Block (ReMB) architecture for an 8-tap Daubechies wavelet filter employed in a tree structured filter bank which targets the recent Field-Programmable-Gate-Array (FPGA) technologies. The ReMB is used to replace the expensive and power hungry multiplier blocks as well as the coefficient memories required in time-multiplexed finite impulse response filter architectures. The proposed architecture is implemented on a Kintex-7 FPGA and the resource utilization, maximum operating frequency and the estimated dynamic power consumption figures are reported and compared with the literature. The results demonstrated that the proposed architecture reduces the hard-ware utilization by 30% and improves the power consumption by 44% in comparison to architectures with general purpose multipliers. Thus, the proposed implementation can be deployed in low-cost low-power embedded platforms for portable medical devices.