焊料厚度对功率VDMOS器件封装热阻影响的研究

2018 10th International Conference on Communications, Circuits and Systems (ICCCAS) Pub Date : 2018-12-01 DOI:10.1109/ICCCAS.2018.8769261

Wei Gao, Yining Ma, Zhaofeng Sun, Pengfei Yin, M. Ren, Jin-ping Zhang, Zehong Li, Bo Zhang, W. Du

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引用次数: 1

摘要

功率VDMOS器件的热阻是反映其热特性和可靠性的重要参数。焊料层是对热阻有很大影响的重要元件之一。本文以ITO-220封装中三种不同功率的VDMOS为样品，分析了焊料层厚度与热阻之间的关系。通过有限元模拟和实验结果，得出热阻与焊料层厚度近似成线性关系的结论。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Study of the Influence of Solder Thickness on the Thermal Resistance of Power VDMOS Device Package

The thermal resistance of the power VDMOS device is an important parameter reflecting its thermal characteristics and reliability. The solder layer is one of the most important component which has a great influence on the thermal resistance. In this paper, three different power VDMOS in ITO-220 package are used as samples to analyze the relationship between the thickness of the solder layer and the thermal resistance. Through the results of finite element simulation and experiment, it is concluded that the thermal resistance is approximately linear with the thickness of solder layer.

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2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)

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