{"title":"异构计算平台上定向梯度直方图的软硬件协同设计","authors":"Yuan-Kai Wang, Hung-Yu Chen, Kuan-Yu Chen, Shih-Yu Huang","doi":"10.1109/ICMLC48188.2019.8949276","DOIUrl":null,"url":null,"abstract":"Histogram of oriented gradients (HOG) is a highly important feature representation in computer vision for many applications such as objection detection. The HOG computes local histograms of oriented gradients of pixel luminance on a dense grid of uniformly spaced cells and normalized to be a feature vector. Its computational complexity is high, and its implementation on edge computing and embedded devices is challenging. This paper proposes a hardware software codesign strategy to redesign the HOG algorithm. Pipelining and hardware acceleration by FPGA are applied in the design to the performance improvement of HOG. The design is implemented on a heterogeneous computing platform and with high level synthesis techniques exploiting C-code to accelerate the design of hardware circuits. Our results of full HD images achieve 500 times speed-up compared with software implementation.","PeriodicalId":221349,"journal":{"name":"2019 International Conference on Machine Learning and Cybernetics (ICMLC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Hardware-Software Codesign of Histogram of Oriented Gradients on Heterogeneous Computing Platform\",\"authors\":\"Yuan-Kai Wang, Hung-Yu Chen, Kuan-Yu Chen, Shih-Yu Huang\",\"doi\":\"10.1109/ICMLC48188.2019.8949276\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Histogram of oriented gradients (HOG) is a highly important feature representation in computer vision for many applications such as objection detection. The HOG computes local histograms of oriented gradients of pixel luminance on a dense grid of uniformly spaced cells and normalized to be a feature vector. Its computational complexity is high, and its implementation on edge computing and embedded devices is challenging. This paper proposes a hardware software codesign strategy to redesign the HOG algorithm. Pipelining and hardware acceleration by FPGA are applied in the design to the performance improvement of HOG. The design is implemented on a heterogeneous computing platform and with high level synthesis techniques exploiting C-code to accelerate the design of hardware circuits. Our results of full HD images achieve 500 times speed-up compared with software implementation.\",\"PeriodicalId\":221349,\"journal\":{\"name\":\"2019 International Conference on Machine Learning and Cybernetics (ICMLC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 International Conference on Machine Learning and Cybernetics (ICMLC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMLC48188.2019.8949276\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International Conference on Machine Learning and Cybernetics (ICMLC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMLC48188.2019.8949276","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
定向梯度直方图(Histogram of oriented gradients, HOG)是计算机视觉中一个非常重要的特征表示方法,可用于目标检测等领域。HOG在均匀间隔的密集网格上计算像素亮度方向梯度的局部直方图,并归一化为特征向量。它的计算复杂度很高,并且在边缘计算和嵌入式设备上的实现具有挑战性。本文提出了一种软硬件协同设计策略来重新设计HOG算法。在设计中采用流水线技术和FPGA硬件加速技术来提高HOG的性能。该设计在异构计算平台上实现,采用高级综合技术,利用c代码加速硬件电路的设计。与软件实现相比,我们的全高清图像的速度提高了500倍。
Hardware-Software Codesign of Histogram of Oriented Gradients on Heterogeneous Computing Platform
Histogram of oriented gradients (HOG) is a highly important feature representation in computer vision for many applications such as objection detection. The HOG computes local histograms of oriented gradients of pixel luminance on a dense grid of uniformly spaced cells and normalized to be a feature vector. Its computational complexity is high, and its implementation on edge computing and embedded devices is challenging. This paper proposes a hardware software codesign strategy to redesign the HOG algorithm. Pipelining and hardware acceleration by FPGA are applied in the design to the performance improvement of HOG. The design is implemented on a heterogeneous computing platform and with high level synthesis techniques exploiting C-code to accelerate the design of hardware circuits. Our results of full HD images achieve 500 times speed-up compared with software implementation.