{"title":"一种具有谐波功率回收的c波段换向lc -负r延迟电路,实现1.5 ns延迟,1.4 ghz BW和6db IL","authors":"Shuxin Ming, Rakibul Islam, Jin Zhou","doi":"10.1109/RFIC54546.2022.9863138","DOIUrl":null,"url":null,"abstract":"This work presents a commutated-LC-negative-R delay circuit for broadband signal processing at RF. It introduces negative resistance to compensate inductor loss in a commutated- LC broadband delay circuit, and unveils a new capability of time-varying RF circuits that we call harmonic power recycling. For a time-invariant circuit or an N -path filter circuit, its desired passband consists of only one harmonic. Hence, energies at all other harmonics provided by the broadband negative resistance are wasted. In contrast, a commutated-LC broadband delay circuit has multiple harmonics across its passband, recycling the wasted RF energies from the negative resistance. This harmonic power recycling results in improved noise figure and low dc power in addition to reduced insertion loss (IL). A proof-of-concept CMOS delay line is implemented, achieving 1.5-ns delay, 1.4-GHz instantaneous bandwidth (BW), and 6-dB IL at the C band.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"186 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A C-Band Commutated-LC-Negative-R Delay Circuit with Harmonic Power Recycling Achieving 1.5-ns Delay, 1.4-GHz BW, and 6-dB IL\",\"authors\":\"Shuxin Ming, Rakibul Islam, Jin Zhou\",\"doi\":\"10.1109/RFIC54546.2022.9863138\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents a commutated-LC-negative-R delay circuit for broadband signal processing at RF. It introduces negative resistance to compensate inductor loss in a commutated- LC broadband delay circuit, and unveils a new capability of time-varying RF circuits that we call harmonic power recycling. For a time-invariant circuit or an N -path filter circuit, its desired passband consists of only one harmonic. Hence, energies at all other harmonics provided by the broadband negative resistance are wasted. In contrast, a commutated-LC broadband delay circuit has multiple harmonics across its passband, recycling the wasted RF energies from the negative resistance. This harmonic power recycling results in improved noise figure and low dc power in addition to reduced insertion loss (IL). A proof-of-concept CMOS delay line is implemented, achieving 1.5-ns delay, 1.4-GHz instantaneous bandwidth (BW), and 6-dB IL at the C band.\",\"PeriodicalId\":415294,\"journal\":{\"name\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"186 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC54546.2022.9863138\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863138","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
摘要
本文提出了一种用于射频宽带信号处理的换相lc -负r延迟电路。它在整流LC宽带延迟电路中引入负电阻来补偿电感损耗,并揭示了时变射频电路的新能力,我们称之为谐波功率回收。对于时不变电路或N路滤波电路,其期望通带仅由一个谐波组成。因此,宽带负电阻提供的所有其他谐波的能量都被浪费了。相反,换相lc宽带延迟电路在其通频带上具有多个谐波,从负电阻中回收浪费的射频能量。这种谐波功率循环除了降低插入损耗(IL)外,还可以改善噪声系数和降低直流功率。实现了一种概念验证型CMOS延迟线,在C波段实现了1.5 ns延迟、1.4 ghz瞬时带宽(BW)和6 db IL。
A C-Band Commutated-LC-Negative-R Delay Circuit with Harmonic Power Recycling Achieving 1.5-ns Delay, 1.4-GHz BW, and 6-dB IL
This work presents a commutated-LC-negative-R delay circuit for broadband signal processing at RF. It introduces negative resistance to compensate inductor loss in a commutated- LC broadband delay circuit, and unveils a new capability of time-varying RF circuits that we call harmonic power recycling. For a time-invariant circuit or an N -path filter circuit, its desired passband consists of only one harmonic. Hence, energies at all other harmonics provided by the broadband negative resistance are wasted. In contrast, a commutated-LC broadband delay circuit has multiple harmonics across its passband, recycling the wasted RF energies from the negative resistance. This harmonic power recycling results in improved noise figure and low dc power in addition to reduced insertion loss (IL). A proof-of-concept CMOS delay line is implemented, achieving 1.5-ns delay, 1.4-GHz instantaneous bandwidth (BW), and 6-dB IL at the C band.