{"title":"用于超低电压应用的大体积驱动全差分放大器","authors":"D. Arbet, M. Kovác, V. Stopjaková, M. Potocný","doi":"10.23919/MIPRO.2018.8400018","DOIUrl":null,"url":null,"abstract":"This paper deals with the design and analysis of a fully differential difference amplifier (FDDA) based on a pseudo differential topology that was implemented in a 130 nm CMOS technology. The proposed FDDA can reliably work with its power supply voltage as low as 0.4 V. The FDDA was designed using the bulk-driven technique, and Rail-to-Rail (RtR) input voltage range was ensured through the use of bulk-driven input transistors. Additionally, the RtR input/output CMFB, based on FDDA topology, was proposed. The output voltage range is near RtR (±0.36 V). The CMRR and PSRR of 60.2 dB and 64.4 dB was achieved, respectively. The proposed FDDA shows very good linearity in wide output range, thus the THD of −156 dB@1 mV was reached. Furthermore, the proposed FDDA was used as a building block of an ultra-low voltage-to-frequency converter.","PeriodicalId":431110,"journal":{"name":"2018 41st International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Bulk-driven fully differential difference amplifier for ultra-low voltage applications\",\"authors\":\"D. Arbet, M. Kovác, V. Stopjaková, M. Potocný\",\"doi\":\"10.23919/MIPRO.2018.8400018\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper deals with the design and analysis of a fully differential difference amplifier (FDDA) based on a pseudo differential topology that was implemented in a 130 nm CMOS technology. The proposed FDDA can reliably work with its power supply voltage as low as 0.4 V. The FDDA was designed using the bulk-driven technique, and Rail-to-Rail (RtR) input voltage range was ensured through the use of bulk-driven input transistors. Additionally, the RtR input/output CMFB, based on FDDA topology, was proposed. The output voltage range is near RtR (±0.36 V). The CMRR and PSRR of 60.2 dB and 64.4 dB was achieved, respectively. The proposed FDDA shows very good linearity in wide output range, thus the THD of −156 dB@1 mV was reached. Furthermore, the proposed FDDA was used as a building block of an ultra-low voltage-to-frequency converter.\",\"PeriodicalId\":431110,\"journal\":{\"name\":\"2018 41st International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO)\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-05-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 41st International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/MIPRO.2018.8400018\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 41st International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/MIPRO.2018.8400018","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Bulk-driven fully differential difference amplifier for ultra-low voltage applications
This paper deals with the design and analysis of a fully differential difference amplifier (FDDA) based on a pseudo differential topology that was implemented in a 130 nm CMOS technology. The proposed FDDA can reliably work with its power supply voltage as low as 0.4 V. The FDDA was designed using the bulk-driven technique, and Rail-to-Rail (RtR) input voltage range was ensured through the use of bulk-driven input transistors. Additionally, the RtR input/output CMFB, based on FDDA topology, was proposed. The output voltage range is near RtR (±0.36 V). The CMRR and PSRR of 60.2 dB and 64.4 dB was achieved, respectively. The proposed FDDA shows very good linearity in wide output range, thus the THD of −156 dB@1 mV was reached. Furthermore, the proposed FDDA was used as a building block of an ultra-low voltage-to-frequency converter.