2.5Gb/s防静电双通道光收发器阵列

Jung-Won Han, Boo-Young Choi, Kang-Yeob Park, W. Oh, Sung Min Park
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引用次数: 16

摘要

本文介绍了一种采用标准0.18 μ m CMOS技术实现的高速数字接口双通道光收发器阵列的设计。发射器以2.5 Gb/s的速度驱动2通道VCSEL阵列,配备APC (5-15 mA)和AMC (4-20 mApp)环路,以实现恒定可靠的光功率输出。同时,接收机利用共门跨阻放大器,具有87 dbomga的跨阻增益,2 pF输入寄生电容时具有1.4 GHz的带宽,10-12误码率时具有-18 dBm的灵敏度,并且在带宽范围内TX和RX之间的串扰小于-20 dB。整个2通道收发器阵列芯片的功耗为500mw。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 2.5Gb/s ESD-protected dual-channel optical transceiver array
This paper describes the design of a dual-channel optical transceiver array realized in a standard 0.18 mum CMOS technology for the applications of high-speed digital interface. The transmitter drives a 2-channel VCSEL array at 2.5 Gb/s, equipped with the APC (5-15 mA) and AMC (4-20 mApp) loops for constant and reliable optical power outputs. Meanwhile, the receiver exploits the common-gate transimpedance amplifier, demonstrating 87 dBOmega transimpedance gain, 1.4 GHz bandwidth for 2 pF input parasitic capacitance, -18 dBm sensitivity for 10-12 BER, and less than -20 dB crosstalk between TX and RX within the bandwidth. The whole 2-channel transceiver array chip dissipates 500 mW.
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