基于N个比较器的二进搜索ADC设计

Shah Palash Manish Bhai, D. N. Gaonkar
{"title":"基于N个比较器的二进搜索ADC设计","authors":"Shah Palash Manish Bhai, D. N. Gaonkar","doi":"10.1109/CMI.2016.7413798","DOIUrl":null,"url":null,"abstract":"In this paper, an Analog to Digital Converter (ADC) based on binary-search algorithm is proposed. Existing binary-search based ADC design requires 2N-1 comparators for an N-bit ADC while the proposed design requires only N comparators. This ADC uses a switching network made up of static logic gates and MOSFET switches for predicting the reference voltage for the comparators. The proof-of-concept 3-bit ADC only consists of a reference ladder, 3 comparators, 6 n-MOSFET switches and 6 logic gates. The proposed 3-bit prototype was simulated using TINA-TI simulation software. The functionality of the ADC was ensured by giving sine and ramp input to the ADC. Also, the settling time of the ADC for different input voltage ranges was found out by giving step input to the ADC.","PeriodicalId":244262,"journal":{"name":"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of binary search ADC using N comparators\",\"authors\":\"Shah Palash Manish Bhai, D. N. Gaonkar\",\"doi\":\"10.1109/CMI.2016.7413798\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, an Analog to Digital Converter (ADC) based on binary-search algorithm is proposed. Existing binary-search based ADC design requires 2N-1 comparators for an N-bit ADC while the proposed design requires only N comparators. This ADC uses a switching network made up of static logic gates and MOSFET switches for predicting the reference voltage for the comparators. The proof-of-concept 3-bit ADC only consists of a reference ladder, 3 comparators, 6 n-MOSFET switches and 6 logic gates. The proposed 3-bit prototype was simulated using TINA-TI simulation software. The functionality of the ADC was ensured by giving sine and ramp input to the ADC. Also, the settling time of the ADC for different input voltage ranges was found out by giving step input to the ADC.\",\"PeriodicalId\":244262,\"journal\":{\"name\":\"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CMI.2016.7413798\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CMI.2016.7413798","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

提出了一种基于二叉搜索算法的模数转换器(ADC)。现有的基于二叉搜索的ADC设计需要2N-1个比较器,而本设计只需要N个比较器。该ADC使用由静态逻辑门和MOSFET开关组成的开关网络来预测比较器的参考电压。概念验证的3位ADC仅由一个参考阶梯、3个比较器、6个n-MOSFET开关和6个逻辑门组成。采用TINA-TI仿真软件对所提出的3位原型进行了仿真。通过向ADC提供正弦和斜坡输入,确保了ADC的功能。同时,通过对ADC进行阶跃输入,得出了ADC在不同输入电压范围下的稳定时间。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of binary search ADC using N comparators
In this paper, an Analog to Digital Converter (ADC) based on binary-search algorithm is proposed. Existing binary-search based ADC design requires 2N-1 comparators for an N-bit ADC while the proposed design requires only N comparators. This ADC uses a switching network made up of static logic gates and MOSFET switches for predicting the reference voltage for the comparators. The proof-of-concept 3-bit ADC only consists of a reference ladder, 3 comparators, 6 n-MOSFET switches and 6 logic gates. The proposed 3-bit prototype was simulated using TINA-TI simulation software. The functionality of the ADC was ensured by giving sine and ramp input to the ADC. Also, the settling time of the ADC for different input voltage ranges was found out by giving step input to the ADC.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信