无线应用中GME-TRC MOSFET多层栅极设计的评估

P. Malik, R. Chaujar, Mridula Gupta, R. Gupta
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引用次数: 0

摘要

本文从线性性能指标的角度研究了多层栅极设计同化对栅极材料工程梯形凹槽沟道(GME-TRC) MOSFET在无线应用中的影响,使用器件模拟器:ATLAS和DEVEDIT,并与传统梯形凹槽沟道(TRC)和GME-TRC MOSFET进行了比较。仿真研究表明,与传统的trc - trc MOSFET和GME-TRC MOSFET相比,采用多层栅极实现的GME-TRC MOSFET在FOM指标VIP2、VIP3、IIP3和高阶跨导系数gm1、gm2、gm3方面的线性性能显著提高,从而证明了其在高性能无线应用中的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Evaluation of multi-layered gate design on GME-TRC MOSFET for wireless applications
In this paper, the impact of multi-layered gate design assimilation on Gate Material Engineered Trapezoidal Recessed Channel (GME-TRC) MOSFET has been studied for wireless applications in terms of linearity performance metrics, using device simulators: ATLAS and DEVEDIT, and compared with conventional Trapezoidal Recessed channel (TRC) and GME-TRC MOSFETs. Simulation study reveals that GME-TRC MOSFET with Multi-Layered Gate implementation significantly enhances the linearity performance in comparison with conventional TRC-MOSFET and GME-TRC MOSFET in terms of figure of merit (FOM) metrics: VIP2, VIP3, IIP3 and higher order transconductance coefficients: gm1, gm2, gm3, thus proving its efficacy for high performance wireless applications.
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