{"title":"PWM电压型DC-DC开关变换器的环路带宽扩展技术","authors":"Chenchang Zhan, W. Ki","doi":"10.1109/ASSCC.2009.5357160","DOIUrl":null,"url":null,"abstract":"A loop bandwidth extension technique for voltage mode pulsewidth modulated DC-DC switching converters operating in continuous conduction mode is proposed. The conventional fixed ramp is replaced by a ramp with a variable slope adjusted by the output voltage through a low power and area-efficient transconductance cell, pushing the complex pole pair of the LC filter to a higher frequency and hence improves the system loop bandwidth. Theoretical analysis is presented. A prototype buck converter with a maximum load current of 50mA is fabricated using a 0.35μm CMOS process, occupying an active area of 0.095mm2. Experimental results show that the proposed converter has reduced transient overshoot and undershoot, and settling times are reduced by 50% compared to a conventional voltage mode buck converter. The results match well with the theoretical analysis.","PeriodicalId":263023,"journal":{"name":"2009 IEEE Asian Solid-State Circuits Conference","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Loop bandwidth extension technique for PWM voltage mode DC-DC switching converters\",\"authors\":\"Chenchang Zhan, W. Ki\",\"doi\":\"10.1109/ASSCC.2009.5357160\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A loop bandwidth extension technique for voltage mode pulsewidth modulated DC-DC switching converters operating in continuous conduction mode is proposed. The conventional fixed ramp is replaced by a ramp with a variable slope adjusted by the output voltage through a low power and area-efficient transconductance cell, pushing the complex pole pair of the LC filter to a higher frequency and hence improves the system loop bandwidth. Theoretical analysis is presented. A prototype buck converter with a maximum load current of 50mA is fabricated using a 0.35μm CMOS process, occupying an active area of 0.095mm2. Experimental results show that the proposed converter has reduced transient overshoot and undershoot, and settling times are reduced by 50% compared to a conventional voltage mode buck converter. The results match well with the theoretical analysis.\",\"PeriodicalId\":263023,\"journal\":{\"name\":\"2009 IEEE Asian Solid-State Circuits Conference\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE Asian Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2009.5357160\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2009.5357160","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Loop bandwidth extension technique for PWM voltage mode DC-DC switching converters
A loop bandwidth extension technique for voltage mode pulsewidth modulated DC-DC switching converters operating in continuous conduction mode is proposed. The conventional fixed ramp is replaced by a ramp with a variable slope adjusted by the output voltage through a low power and area-efficient transconductance cell, pushing the complex pole pair of the LC filter to a higher frequency and hence improves the system loop bandwidth. Theoretical analysis is presented. A prototype buck converter with a maximum load current of 50mA is fabricated using a 0.35μm CMOS process, occupying an active area of 0.095mm2. Experimental results show that the proposed converter has reduced transient overshoot and undershoot, and settling times are reduced by 50% compared to a conventional voltage mode buck converter. The results match well with the theoretical analysis.