线性规划的大小，V/sub / /和V/sub / /分配

ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005. Pub Date : 2005-10-24 DOI:10.1109/LPE.2005.195505

D. Chinnery, K. Keutzer

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引用次数: 12

摘要

大多数电路尺寸工具计算每个栅极的延迟和功率或面积之间的权衡，然后贪婪地改变最佳权衡的栅极。我们证明这是次优的。相反，我们使用线性程序来最小化电路功率。线性程序提供了一个快速和同步的分析，每个门如何影响它有路径的门。与商业软件相比，我们的方法可将功耗降低30%，库的功耗为0.13/spl mu/m。编制和求解线性程序的运行时间与电路尺寸成线性关系。

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Linear programming for sizing, V/sub th/ and V/sub dd/ assignment

Most circuit sizing tools calculate the tradeoff between each gate's delay and power or area, and then greedily change the gate with the best tradeoff. We show this is suboptimal. Instead we use a linear program to minimize circuit power. The linear program provides a fast and simultaneous analysis of how each gate affects gates it has a path to. Our approach reduces power by up to 30% compared to commercial software, with a 0.13/spl mu/m library. The runtime for posing and solving the linear program scales linearly with circuit size.

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来源期刊

ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005.

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