A hybrid genetic algorithm applied to automatic parallel controller code generation

High performance real-time digital controllers employ parallel hardware such as transputers and digital signal processors to achieve short response times when this is not achievable with conventional uni-processor systems. Implementing such fine-grained parallel software is error-prone and difficult. We show how a hybrid genetic algorithm can be applied to automate this parallel code generation for a set of regular control problems such that significant speedup is obtained with few constraints on hardware. Genetic algorithms are particularly suited to this problem since the mapping problem is combinatorial in nature. However, one drawback of the genetic algorithm is that it is sensitive to small changes in the problem size. To overcome this problem the presented approach partitions the original problem into sub-problems, called boxes. The scheduling of these boxes is similar to the VLSI placement problem.