各向异性非导电薄膜性能对三维集成电路的影响

Mei-chien Lu
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引用次数: 0

摘要

受更高带宽和小尺寸的2.5D和3D IC集成技术趋势的推动,为了便于热管理,对高导热材料的需求正在增长。同时,键合线上关键尺寸的限制对材料和加工提出了新的挑战。本研究分析了高导热材料的进步和热管理集成的改进。目前,先进封装中常用的聚合物基材料的下填料被迫使用小填料进行3D集成电路集成。聚合物复合材料中填料尺寸的减小往往会降低其提高导热性的能力。然而,目前晶圆级封装的不断发展和采用提供了新的处理能力和降低成本。导电性薄膜是随着层压工艺的发展而发展起来的一种新型下填料。因此,下填料导热系数的改善可分为两类,即复合材料的改进和新替代材料的考虑。本研究采用数学模型来解释高导热非导电薄膜材料各向异性的演化过程。采用有限元方法研究了新型各向异性薄膜复合底填料在三维集成电路系统中减小热点的能力。以各向异性薄膜复合底填料集成的高带宽存储JEDEC标准3D IC结构(HBM2)为例进行了研究。由于需要额外的工艺步骤将新材料集成到3D集成集成IC的先进封装中,因此讨论扩展到成本分析。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Effects of anisotropic nonconductive film properties on 3D IC integration
Driven by technology trends towards 2.5D and 3D IC integration for higher bandwidth and small form factor, the demand for high thermal conductivity materials is growing in order to facilitate thermal management. At the same time, constraints in critical dimensions at the bondline set new challenges for materials and processing. This study analyzes both advancement in high thermal conductivity materials and improvements in integration for thermal management. Polymeric matrix materials often used as underfill in advanced packaging currently was forced to the use of small fillers for 3D IC integration. This reduction of filler size in polymer composite tends to reduce its ability to improve thermal conductivity. Presently, however, the increasing development and adoption of wafer level packaging offers new processing capability and cost reduction. Nonconductive film has evolved as a new form for underfill materials associated with laminating processes. Thermal conductivity improvement in underfill can therefore be categorized into two categories, the improvement of composite materials and the consideration of new alternative materials. This study uses mathematical models to explain the evolution of anisotropic properties of high thermal conductivity nonconductive film materials. Finite element analysis is conducted to assess the ability of hot spot reduction in a 3D IC system with the innovative anisotropic thin film composite underfill. The high bandwidth memory JEDEC standard 3D IC structure (HBM2) integrated with anisotropic thin film composite underfill is used as an example for this study. Discussions are expanded to cost analysis due to the needs of additional process steps to integrate the new materials into advanced packaging for 3D IC integration.
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