{"title":"芯片上实时可重构系统的硬件加速技术目录","authors":"N. Bergmann, Peter Waldeck, John A. Williams","doi":"10.1109/IWSOC.2003.1213017","DOIUrl":null,"url":null,"abstract":"The new technology of reconfigurable System-on-Chip is shown to be a good match to the requirements of real-time embedded systems. In particular, the judicious use of specialized data processing peripherals can reduce the CPU load significantly and greatly ease the task of guaranteeing that real-time deadlines are met in complex multiprocessing real-time systems. A catalog of other possible uses for the reconfigurable logic resources on such a chip which can assist in improving real-time system performance is also presented.","PeriodicalId":259178,"journal":{"name":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A catalog of hardware acceleration techniques for real-time reconfigurable system on chip\",\"authors\":\"N. Bergmann, Peter Waldeck, John A. Williams\",\"doi\":\"10.1109/IWSOC.2003.1213017\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The new technology of reconfigurable System-on-Chip is shown to be a good match to the requirements of real-time embedded systems. In particular, the judicious use of specialized data processing peripherals can reduce the CPU load significantly and greatly ease the task of guaranteeing that real-time deadlines are met in complex multiprocessing real-time systems. A catalog of other possible uses for the reconfigurable logic resources on such a chip which can assist in improving real-time system performance is also presented.\",\"PeriodicalId\":259178,\"journal\":{\"name\":\"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-07-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWSOC.2003.1213017\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2003.1213017","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A catalog of hardware acceleration techniques for real-time reconfigurable system on chip
The new technology of reconfigurable System-on-Chip is shown to be a good match to the requirements of real-time embedded systems. In particular, the judicious use of specialized data processing peripherals can reduce the CPU load significantly and greatly ease the task of guaranteeing that real-time deadlines are met in complex multiprocessing real-time systems. A catalog of other possible uses for the reconfigurable logic resources on such a chip which can assist in improving real-time system performance is also presented.