用于提高面积和功率效率的混合NEMS-CMOS DC-DC变换器

S. Manohar, R. Venkatasubramanian, P. Balsara
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引用次数: 9

摘要

纳米机电(NEM)继电器是一类很有前途的新兴器件,具有零泄漏操作。NEM继电器逻辑电路的终端应用最近被提出了很多[1][2]。本研究探讨了NEM继电器在片上DC-DC转换器中的应用。作为在集成电力电子中使用NEMS的可行性研究,在NEMS-CMOS混合设计中实现了规格适合便携式应用的不连续传导模式(DCM)降压调节器,并将结果与标准商用0.35 μm CMOS实现进行了比较。NEM继电器开关的Ron是恒定的,对栅极压转率不敏感。这创造了电源开关设计的范式转变。这与无限Roff相结合,与CMOS相比具有显着的面积和功率优势。精确的Verilog-A模型是基于已发表的NEM继电器[1]的制造结果开发的,工作电压为1V,标称气隙为5-10nm。这项工作表明,NEMS-CMOS混合DC-DC转换器比CMOS节省60V的面积,在最大负载条件下(50mA)达到95%的效率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Hybrid NEMS-CMOS DC-DC Converter for Improved Area and Power Efficiency
Nano-electromechanical (NEM) relays are a promising class of emerging devices that exhibit zero leakage operation. Numerous end applications of NEM relay logic circuits have been proposed recently [1][2]. This work explores the usage of NEM relays in on-chip DC-DC converters. As a feasibility study of using NEMS in integrated power electronics, discontinuous conduction mode (DCM) buck regulator with specifications suitable for portable applications has been implemented in a NEMS-CMOS hybrid design and the results are compared against a standard commercial 0.35 μm CMOS implementation. Ron of the NEM relay switch is constant and is insensitive to the gate slew rate. This creates a paradigm shift in design of power switches. This coupled with infinite Roff offers significant area and power advantages over CMOS. Accurate Verilog-A models were developed based on published fabrication results of NEM relays [1] operating at 1V with a nominal air gap of 5-10nm. This work shows that NEMS-CMOS hybrid DC-DC converter has an area savings of 60V over CMOS and achieves 95% efficiency at max load condition (50mA).
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