下一代环境，用于极快的测试模式生成

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference Pub Date : 1993-09-20 DOI:10.1109/EURDAC.1993.410671

Gabriele Pulini, S. Hamacher

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引用次数: 0

摘要

讨论了测试在集成电路和集成电路设计中的重要性，提出了一些新的面向测试的设计(DFT)策略。描述了测试向量创建和验证的特定方法的优点，该方法将两个扫描测试工具紧密地连接到目标设计流程中。这些工具是一个顺序的、部分扫描的自动测试模式发生器(ATPG)和一个为全扫描设计优化的ATPG。本文还介绍了使用这些工具的一些客户结果

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Next generation environment for extremely fast test pattern generation

The importance of test in ASIC and IC design is discussed, and some new design-for-test (DFT) strategies are presented. The advantages of a specific method for test vector creation and validation that tightly links two scan-test tools into the target design flow are described. These tools are a sequential, partial-scan automatic test pattern generator (ATPG) and an ATPG optimized for full-scan designs. Some customer results with these tools are presented as well.<>

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Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference

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