{"title":"Rössler-based在FPGA上实现的混沌通信系统","authors":"Jesse Schmitz, Lei Zhang","doi":"10.1109/CCECE.2017.7946729","DOIUrl":null,"url":null,"abstract":"This paper describes the design and implementation of a simple chaotic communication system on FPGA using Rössler's chaotic system of equations. The system was simulated to insure proper operation, before being implemented on hardware using VHDL. Throughput of 2850 Mbps was obtained. The implementation results on Xilinx Zynq-7000 series FPGA show the feasibility of using digital hardware to implement a chaotic communication system using Rössler's system.","PeriodicalId":238720,"journal":{"name":"2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"Rössler-based chaotic communication system implemented on FPGA\",\"authors\":\"Jesse Schmitz, Lei Zhang\",\"doi\":\"10.1109/CCECE.2017.7946729\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the design and implementation of a simple chaotic communication system on FPGA using Rössler's chaotic system of equations. The system was simulated to insure proper operation, before being implemented on hardware using VHDL. Throughput of 2850 Mbps was obtained. The implementation results on Xilinx Zynq-7000 series FPGA show the feasibility of using digital hardware to implement a chaotic communication system using Rössler's system.\",\"PeriodicalId\":238720,\"journal\":{\"name\":\"2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CCECE.2017.7946729\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CCECE.2017.7946729","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Rössler-based chaotic communication system implemented on FPGA
This paper describes the design and implementation of a simple chaotic communication system on FPGA using Rössler's chaotic system of equations. The system was simulated to insure proper operation, before being implemented on hardware using VHDL. Throughput of 2850 Mbps was obtained. The implementation results on Xilinx Zynq-7000 series FPGA show the feasibility of using digital hardware to implement a chaotic communication system using Rössler's system.