基于电磁耦合d类LC振荡器的2.3GHz全集成DC-DC变换器,在22nm FDSOI CMOS中实现78.1%的效率

Alessandro Novello, Gabriele Atzeni, Giorgio Cristiano, Mathieu Coustans, Taekwang Jang
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引用次数: 1

摘要

采用22nm FDSOI CMOS技术,实现了一种基于电磁耦合d类LC振荡器的全集成DC-DC变换器,功率密度为0.42-3.2W/mm2,效率为69.4-78.1%。本工作提出了片上8形垂直堆叠变压器,其正交放置具有高功率密度,低期望耦合系数和小电磁干扰(EMI)辐射。此外,由于采用4相电磁供电方案,在不附加任何输出电容的情况下,输出纹波<10mV。转换器还提供了一个占空比工作模式,使<2%的效率下降到100μW。对于5.9nH电感(高效率版本),总芯片面积为0.59mm2,对于3.9nH电感(高功率密度版本),总芯片面积为0.22mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 2.3GHz Fully Integrated DC-DC Converter based on Electromagnetically Coupled Class-D LC Oscillators achieving 78.1% Efficiency in 22nm FDSOI CMOS
A fully integrated DC-DC converter based on electromagnetically coupled class-D LC oscillators achieving 0.42-3.2W/mm2 power density and 69.4-78.1% efficiency is demonstrated in a 22nm FDSOI CMOS technology. This work proposes on-chip 8-shaped and vertically stacked transformers, which are orthogonally placed for the high-power density, low undesired coupling coefficient and small electromagnetic interference (EMI) radiation. In addition, the output ripple is <10mV without attaching any output capacitor thanks to the 4-phase electromagnetic power delivery scheme. The converter also offers a duty cycled operation mode that enables <2% efficiency degradation down to 100μW. The total chip area is 0.59mm2 for 5.9nH inductance (high efficiency version) and 0.22mm2 for 3.9nH (high power density versions).
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