{"title":"计算机系统的最优两级不等错误控制码","authors":"T. Ritthongpitak, M. Kitakami, E. Fujiwara","doi":"10.1109/FTCS.1996.534606","DOIUrl":null,"url":null,"abstract":"Error control codes are now successfully applied to computer systems, especially to memory systems. This paper proposes an extended class of unequal error control codes which protects the fixed-byte strongly in computer words from multiple errors. The fixed-byte stores valuable information such as control and address information in computer/communication messages or pointer information in database words. Here, fixed-byte means the clustered information digits in the word whose position is determined in advance. As a simple and practical class of the codes, this paper proposes an extended type of two-level unequal error control codes which has two error control levels in the codeword; one with strong error control function for the fixed-byte, and the other with weak function for the other part of the codeword. The proposed optimal codes are single-bit error correction, double-bit error detection and fixed b-bit byte error correction code, called SEC-DED-FbEC code, and single-bit plus fixed b-bit byte error correction code, called (S+Fb)EC code, which correct single-bit errors and fixed-byte errors occurring simultaneously. For both types of codes, this paper clarifies necessary and sufficient conditions and bounds on code length, and demonstrates a code construction method of the optimal codes and an evaluation of these codes from the perspectives of error correction/detection capability and decoder hardware complexity.","PeriodicalId":191163,"journal":{"name":"Proceedings of Annual Symposium on Fault Tolerant Computing","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Optimal two-level unequal error control codes for computer systems\",\"authors\":\"T. Ritthongpitak, M. Kitakami, E. Fujiwara\",\"doi\":\"10.1109/FTCS.1996.534606\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Error control codes are now successfully applied to computer systems, especially to memory systems. This paper proposes an extended class of unequal error control codes which protects the fixed-byte strongly in computer words from multiple errors. The fixed-byte stores valuable information such as control and address information in computer/communication messages or pointer information in database words. Here, fixed-byte means the clustered information digits in the word whose position is determined in advance. As a simple and practical class of the codes, this paper proposes an extended type of two-level unequal error control codes which has two error control levels in the codeword; one with strong error control function for the fixed-byte, and the other with weak function for the other part of the codeword. The proposed optimal codes are single-bit error correction, double-bit error detection and fixed b-bit byte error correction code, called SEC-DED-FbEC code, and single-bit plus fixed b-bit byte error correction code, called (S+Fb)EC code, which correct single-bit errors and fixed-byte errors occurring simultaneously. For both types of codes, this paper clarifies necessary and sufficient conditions and bounds on code length, and demonstrates a code construction method of the optimal codes and an evaluation of these codes from the perspectives of error correction/detection capability and decoder hardware complexity.\",\"PeriodicalId\":191163,\"journal\":{\"name\":\"Proceedings of Annual Symposium on Fault Tolerant Computing\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-06-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Annual Symposium on Fault Tolerant Computing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FTCS.1996.534606\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Annual Symposium on Fault Tolerant Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FTCS.1996.534606","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimal two-level unequal error control codes for computer systems
Error control codes are now successfully applied to computer systems, especially to memory systems. This paper proposes an extended class of unequal error control codes which protects the fixed-byte strongly in computer words from multiple errors. The fixed-byte stores valuable information such as control and address information in computer/communication messages or pointer information in database words. Here, fixed-byte means the clustered information digits in the word whose position is determined in advance. As a simple and practical class of the codes, this paper proposes an extended type of two-level unequal error control codes which has two error control levels in the codeword; one with strong error control function for the fixed-byte, and the other with weak function for the other part of the codeword. The proposed optimal codes are single-bit error correction, double-bit error detection and fixed b-bit byte error correction code, called SEC-DED-FbEC code, and single-bit plus fixed b-bit byte error correction code, called (S+Fb)EC code, which correct single-bit errors and fixed-byte errors occurring simultaneously. For both types of codes, this paper clarifies necessary and sufficient conditions and bounds on code length, and demonstrates a code construction method of the optimal codes and an evaluation of these codes from the perspectives of error correction/detection capability and decoder hardware complexity.