基于统计的SAR ADC背景电容失配校正算法

2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI:10.1109/ICTA56932.2022.9963054

Zhiqiang Luo, Peng Wang, Fule Li, Chun Zhang, Zhihua Wang

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引用次数: 0

摘要

针对逐次逼近寄存器(SAR)模数转换器(ADC)，提出了一种基于统计的背景电容失配校正算法。该校正算法能够基于统计原理检测电容失配误差，并通过引入额外的虚拟电容消除信号相关性，收敛速度快。该校准将信噪比(SNDR)从64.57dB提高到82.03dB，并实现了29dB的无杂散动态范围(SFDR)改进。模拟的微分非线性(DNL)和积分非线性(INL)分别为+0.17/-0.13和+0.36/-0.38LSB。

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A statistics-based background capacitor mismatch calibration algorithm for SAR ADC

This paper presents a statistics-based background capacitor mismatch calibration algorithm for successive approximation register (SAR) analog-to-digital converter (ADC). The calibration algorithm is capable of detecting capacitor mismatch errors based on statistical principles and signal correlation is eliminated by introducing additional dummy capacitors, leading to fast convergence. This calibration increases the signal-to-noise-and-distortion ratio (SNDR) from 64.57dB to 82.03dB and achieves 29dB spurious-free dynamic range (SFDR) improvement. The simulated differential nonlinearity (DNL) and integral nonlinearity (INL) are +0.17/-0.13LSB and +0.36/-0.38LSB respectively.

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2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)

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