基于多采样频率电路技术的数字低差稳压器建模

Jiarong Geng, Baodong Yu, Chongfei Shen, Hongda Zhang, Zhaozhe Liu, Peiyuan Wan, Zhijie Chen
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引用次数: 2

摘要

数字式低压稳压器由于可以在低电压下工作而得到广泛的应用。在数字低差稳压器中,高采样频率电路设置时间短,但会产生超调,输出稳定;虽然低采样频率电路输出可以直接稳定,但设置时间太长。本文提出了一种双采样频率电路模型,其目的是在同一电路中包含高采样频率和低采样频率。通过控制电路在不同条件下的采样频率,可以使电路结合在不同采样频率下工作的电路的优点。这缩短了电路设置时间和稳定时间在同一时间。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Modeling Digital Low-Dropout Regulator with a Multiple Sampling Frequency Circuit Technology
The digital low dropout regulators are widely used because it can operate at low supply voltage. In the digital low drop-out regulators, the high sampling frequency circuit has a short setup time, but it will produce overshoot, and then the output can be stabilized; although the low sampling frequency circuit output can be directly stabilized, the setup time is too long. This paper proposes a two sampling frequency circuit model, which aims to include the high and low sampling frequencies in the same circuit. By controlling the sampling frequency of the circuit under different conditions, this allows the circuit to combine the advantages of the circuit operating at different sampling frequencies. This shortens the circuit setup time and the stabilization time at the same time.
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