{"title":"100纳米以下超大规模集成电路技术的新前沿——器件与电路协同设计","authors":"M. Fukuma","doi":"10.1109/VLSIT.2000.852746","DOIUrl":null,"url":null,"abstract":"Scaling has been a basic principle for continuing progress in the development of VLSIs for a long time. However, this situation is changing when the design rule is approaching to 100 nm or less, and the SOC has become important. Instead of conventional scaling, integration of digital innovations in devices and circuits is now playing an important role. This paper analyzes the background of this change and defines new frontiers for device technology of sub-100 nm VLSIs.","PeriodicalId":268624,"journal":{"name":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","volume":"266 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"New frontiers of sub-100 nm VLSI technology-moving toward device and circuit co-design\",\"authors\":\"M. Fukuma\",\"doi\":\"10.1109/VLSIT.2000.852746\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Scaling has been a basic principle for continuing progress in the development of VLSIs for a long time. However, this situation is changing when the design rule is approaching to 100 nm or less, and the SOC has become important. Instead of conventional scaling, integration of digital innovations in devices and circuits is now playing an important role. This paper analyzes the background of this change and defines new frontiers for device technology of sub-100 nm VLSIs.\",\"PeriodicalId\":268624,\"journal\":{\"name\":\"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)\",\"volume\":\"266 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2000.852746\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2000.852746","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
New frontiers of sub-100 nm VLSI technology-moving toward device and circuit co-design
Scaling has been a basic principle for continuing progress in the development of VLSIs for a long time. However, this situation is changing when the design rule is approaching to 100 nm or less, and the SOC has become important. Instead of conventional scaling, integration of digital innovations in devices and circuits is now playing an important role. This paper analyzes the background of this change and defines new frontiers for device technology of sub-100 nm VLSIs.