Design and Implementation of Chaotic Frequency Hopping Sequences based on One Dimensional Chaotic Maps utilizing FPGA

In this paper, a frequency hopping sequence (FHS) generator using one-dimensional chaotic map (1DCM) is implemented using FPGA supported by Xilinx system generator (XSG). The 1DCM methods in this paper are Logistic, Improved Logistic, Tent, Borujeni, Bernoulli-Shift, and Zigzag map. Each 1DCM is discretized using fixed-point operation and the least significant bits from some offset indices are selected and considered as frequency hopping sequence. FPGA SP605 XC6SLX45T-3FGG484 evaluation board is used to test the FHS using the 1DCM system. The chi-squared, Hamming correlation, and complexity analysis are used to test the randomness characteristic of the FHSs generated by 1DCM. Furthermore, the resource utilization of the codes with maximum frequency and throughput are summarized. The results show that FHS-Bernoulli-Shift has the lowest DSP48A1s and peak memory comparing to other maps. In addition, the results show that the FHS using 1DCM is superior compared to the conventional codes with good randomness analysis.