采用0.18 /spl μ l /m CMOS技术的低功耗全差分2.4 ghz预分频器

The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings. Pub Date : 2003-07-22 DOI:10.1109/IWSOC.2003.1213014

S. Machan

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引用次数: 0

摘要

提出了一种全差分2.4 ghz 8/9双模预分频器。该电路以0.18 /spl mu/m 1.8 V CMOS工艺构建，用于低功耗ISM收发器。预分频器由内部缓冲器、分频器本身、差分到CMOS转换器和一个独立的电流源组成。模拟表明最大工作频率为3.05 GHz，这是硅支撑的测量值。其模拟漏电流为2.5 mA，占用面积为130 /spl亩/米/spl倍/ 60 /spl亩/米。

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A low-power fully differential 2.4-GHz prescaler in 0.18 /spl mu/m CMOS technology

A fully differential 2.4-GHz 8/9 dual modulus prescaler is presented in this paper. The circuit has been constructed in a 0.18 /spl mu/m 1.8 V CMOS process for use in a low-power ISM transceiver. The prescaler consists of internal buffering, the divider itself, a differential to CMOS converter, and a self-contained current source. Simulations imply a maximum operating frequency of 3.05 GHz which is the measurement of the silicon support. Its simulated current drain is 2.5 mA and it occupies an area of 130 /spl mu/m /spl times/ 60 /spl mu/m.

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The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.

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