{"title":"一种无线传感器网络的低功耗定位体系结构和系统","authors":"T. Karalar, S. Yamashita, M. Sheets, J. Rabaey","doi":"10.1109/SIPS.2004.1363030","DOIUrl":null,"url":null,"abstract":"Localization (or locationing) is a central concern for ubiquitous self-configuring sensor networks. The implementation of a distributed, least-squares-based localization algorithm is presented. Low power and energy dissipation are key requirements for sensor networks. As part of the sensor network, the localization system must also conform to these requirements. An ultra-low-power and dedicated hardware implementation of the localization system is therefore presented. The cost of fixed-point implementation is also investigated. The design is implemented in a 0.13 /spl mu/ CMOS process. It dissipates 1.7 mW of active power and 0.122 nJ/op of active energy with a silicon area of 0.55 mm/sup 2/. The mean calculated location error due to fixed-point implementation is shown to be 6%.","PeriodicalId":384858,"journal":{"name":"IEEE Workshop onSignal Processing Systems, 2004. SIPS 2004.","volume":"96 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":"{\"title\":\"A low power localization architecture and system for wireless sensor networks\",\"authors\":\"T. Karalar, S. Yamashita, M. Sheets, J. Rabaey\",\"doi\":\"10.1109/SIPS.2004.1363030\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Localization (or locationing) is a central concern for ubiquitous self-configuring sensor networks. The implementation of a distributed, least-squares-based localization algorithm is presented. Low power and energy dissipation are key requirements for sensor networks. As part of the sensor network, the localization system must also conform to these requirements. An ultra-low-power and dedicated hardware implementation of the localization system is therefore presented. The cost of fixed-point implementation is also investigated. The design is implemented in a 0.13 /spl mu/ CMOS process. It dissipates 1.7 mW of active power and 0.122 nJ/op of active energy with a silicon area of 0.55 mm/sup 2/. The mean calculated location error due to fixed-point implementation is shown to be 6%.\",\"PeriodicalId\":384858,\"journal\":{\"name\":\"IEEE Workshop onSignal Processing Systems, 2004. SIPS 2004.\",\"volume\":\"96 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-12-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"24\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Workshop onSignal Processing Systems, 2004. SIPS 2004.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIPS.2004.1363030\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Workshop onSignal Processing Systems, 2004. SIPS 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.2004.1363030","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low power localization architecture and system for wireless sensor networks
Localization (or locationing) is a central concern for ubiquitous self-configuring sensor networks. The implementation of a distributed, least-squares-based localization algorithm is presented. Low power and energy dissipation are key requirements for sensor networks. As part of the sensor network, the localization system must also conform to these requirements. An ultra-low-power and dedicated hardware implementation of the localization system is therefore presented. The cost of fixed-point implementation is also investigated. The design is implemented in a 0.13 /spl mu/ CMOS process. It dissipates 1.7 mW of active power and 0.122 nJ/op of active energy with a silicon area of 0.55 mm/sup 2/. The mean calculated location error due to fixed-point implementation is shown to be 6%.