低功耗VLSI电路设计中dg隧道场效应管的建模

2015 Eighth International Conference on Contemporary Computing (IC3) Pub Date : 2015-08-20 DOI:10.1109/IC3.2015.7346724

Sunil Kumar, B. Raj

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引用次数: 2

摘要

本文提出了双栅(DG)隧道场效应晶体管(ttfet)在50 nm通道长度下的解析电势模型。在该模型中，通道电位是整个结构的长通道电位和短通道摄动的总和，而不仅仅是Si/SiO2界面或通道中心。为了验证我们的分析建模方法，我们将结果与验证我们提出的设计的报告数据进行了比较。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Modeling of DG-Tunnel FET for low power VLSI circuit design

This paper presents the analytical potential modeling of Double Gate (DG) Tunnel Field Effect Transistor (TFET) at 50 nm channel length. In this model approach the channel potential is sum of a long channel potential and a short channel perturbation along with the whole structure rather than just the Si/SiO2 interface or the channel centre. For the validation of our analytical modeling approach we compared our result with reported data which verify our proposed design.

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2015 Eighth International Conference on Contemporary Computing (IC3)

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