用于可重构逻辑的故障扫描器

N. Shnidman, W. Mangione-Smith, M. Potkonjak
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引用次数: 10

摘要

提出了一种现场可编程门阵列(fpga)的在线内置自检技术。该系统的目标是在不使用专用硬件、设备外部硬件、不中断系统操作的情况下检测FPGA预期功能的偏差。解决这些问题的系统对于具有资源限制的关键任务应用程序非常有用。本文提出了一种故障检测系统,通过在线故障扫描方法解决了这些问题。设备内部的资源配置为故障检测。测试扫描整个FPGA,每次检查一个部分。通过在FPGA模型上的仿真,验证了该系统的可行性和有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Fault scanner for reconfigurable logic
We propose a technique for online built-in self-test of Field Programmable Gate Arrays (FPGAs). The goal of this system is to detect deviations from the intended functionality of an FPGA without using special-purpose hardware, hardware external to the device, and without interrupting system operation. A system that solves these problems would be useful for mission-critical applications with resource constraints. We present here a fault detection system which solves these problems through an online fault scanning methodology. Resources internal to the device are configured to test for faults. Testing scans across an FPGA, checking a section at a time. The viability and effectiveness of such a system is supported through simulation of the system on a model FPGA.
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