新型双v独立栅极FinFET电路

M. Rostami, K. Mohanram
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引用次数: 34

摘要

本文介绍了利用双v独立栅极finfet实现新型电路的门功函数和氧化物厚度调谐。具有独立门的双vth finfet可在逻辑门中实现串联和并联合并转换,实现紧凑的低功耗替代方案。此外,它们还能够设计出比传统形式具有更高表达能力和灵活性的新型紧凑型逻辑门,例如,仅使用四个晶体管即可实现12个独特的布尔函数。门的设计和校准使用佛罗里达大学的双门模型进入一个技术库。来自ISCAS和OpenSPARC套件的14个基准电路的合成结果表明,平均而言,与使用32纳米finfet设计的传统库相比,增强库分别降低了9%,21%和27%的延迟,功耗和面积。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Novel dual-Vth independent-gate FinFET circuits
This paper describes gate work function and oxide thickness tuning to realize novel circuits using dual-Vth independent-gate FinFETs. Dual-Vth FinFETs with independent gates enable series and parallel merge transformations in logic gates, realizing compact low power alternatives. Furthermore, they also enable the design of a new class of compact logic gates with higher expressive power and flexibility than conventional forms, e.g., implementing 12 unique Boolean functions using only four transistors. The gates are designed and calibrated using the University of Florida double-gate model into a technology library. Synthesis results for 14 benchmark circuits from the ISCAS and OpenSPARC suites indicate that on average, the enhanced library reduces delay, power, and area by 9%, 21%, and 27%, respectively, over a conventional library designed using FinFETs in 32nm technology.
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