{"title":"基于宽带整数n的相位调制器的相位分辨率保持","authors":"Kevin Grout, J. Kitchen","doi":"10.1109/RWS45077.2020.9050040","DOIUrl":null,"url":null,"abstract":"This paper presents a method for creating a wideband PLL-based phase shifter, which yields maximum phase resolution over its entire range of output frequencies. Furthermore, by generating the phase shifts at low frequency and upconverting the phase information with the PLL, this system can generate phase shifts of resolution comparable with state of the art phase modulators without the need for complex matching or calibration techniques. A rigorous proof of the necessary and sufficient conditions for maximum phase resolution in integer-N synthesizers is presented. A 0.64-2.7 GHz, 7-bit phase modulator system is designed and simulated in a 1V 65nm CMOS process, and the results prove the efficacy of the presented modulation method. The presented design shows finer phase resolution than is achievable using current-starved inverter based delays in the 65nm process.","PeriodicalId":184822,"journal":{"name":"2020 IEEE Radio and Wireless Symposium (RWS)","volume":"4 3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Preservation of Phase Resolution with Wideband Integer-N Based Phase Modulators\",\"authors\":\"Kevin Grout, J. Kitchen\",\"doi\":\"10.1109/RWS45077.2020.9050040\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a method for creating a wideband PLL-based phase shifter, which yields maximum phase resolution over its entire range of output frequencies. Furthermore, by generating the phase shifts at low frequency and upconverting the phase information with the PLL, this system can generate phase shifts of resolution comparable with state of the art phase modulators without the need for complex matching or calibration techniques. A rigorous proof of the necessary and sufficient conditions for maximum phase resolution in integer-N synthesizers is presented. A 0.64-2.7 GHz, 7-bit phase modulator system is designed and simulated in a 1V 65nm CMOS process, and the results prove the efficacy of the presented modulation method. The presented design shows finer phase resolution than is achievable using current-starved inverter based delays in the 65nm process.\",\"PeriodicalId\":184822,\"journal\":{\"name\":\"2020 IEEE Radio and Wireless Symposium (RWS)\",\"volume\":\"4 3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE Radio and Wireless Symposium (RWS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RWS45077.2020.9050040\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Radio and Wireless Symposium (RWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RWS45077.2020.9050040","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Preservation of Phase Resolution with Wideband Integer-N Based Phase Modulators
This paper presents a method for creating a wideband PLL-based phase shifter, which yields maximum phase resolution over its entire range of output frequencies. Furthermore, by generating the phase shifts at low frequency and upconverting the phase information with the PLL, this system can generate phase shifts of resolution comparable with state of the art phase modulators without the need for complex matching or calibration techniques. A rigorous proof of the necessary and sufficient conditions for maximum phase resolution in integer-N synthesizers is presented. A 0.64-2.7 GHz, 7-bit phase modulator system is designed and simulated in a 1V 65nm CMOS process, and the results prove the efficacy of the presented modulation method. The presented design shows finer phase resolution than is achievable using current-starved inverter based delays in the 65nm process.