{"title":"基于PYNQ框架的异构连体跟踪系统","authors":"Zhoujuan Cui, Junshe An","doi":"10.1109/ICCAR49639.2020.9108096","DOIUrl":null,"url":null,"abstract":"Deep neural network models have been gradually applied to the field of visual tracking due to their excellent feature expression capabilities. However, the model is large, which is expressed in the calculation of model parameters. As a result, the implementation platforms of visual tracking algorithm are usually limited by computing power, power consumption, portability, etc. In this paper, we propose a Siamese network tracking scheme based on PYNQ framework, which is deployed on ZYNQ platform. By optimizing the calculation process, Siamese Network accelerated IP core and Region Proposal Network accelerated IP core are designed. The double buffer structure is adopted to effectively call different feature map calculations and reduce off-chip memory access. Python is used to call the accelerated IP core at the top level as the hardware coprocessor to realize the data interaction from the bottom level to the top level and update the system running results asynchronously in Jupyter notebook. We achieve an average 36.7FPS on Xilinx ZCU104 platform, which illustrates that our method has the important practical benefit of allowing lightweight architectures to achieve good performance at high framerates.","PeriodicalId":412255,"journal":{"name":"2020 6th International Conference on Control, Automation and Robotics (ICCAR)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Heterogeneous Siamese Tracking System Based on PYNQ Framework\",\"authors\":\"Zhoujuan Cui, Junshe An\",\"doi\":\"10.1109/ICCAR49639.2020.9108096\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Deep neural network models have been gradually applied to the field of visual tracking due to their excellent feature expression capabilities. However, the model is large, which is expressed in the calculation of model parameters. As a result, the implementation platforms of visual tracking algorithm are usually limited by computing power, power consumption, portability, etc. In this paper, we propose a Siamese network tracking scheme based on PYNQ framework, which is deployed on ZYNQ platform. By optimizing the calculation process, Siamese Network accelerated IP core and Region Proposal Network accelerated IP core are designed. The double buffer structure is adopted to effectively call different feature map calculations and reduce off-chip memory access. Python is used to call the accelerated IP core at the top level as the hardware coprocessor to realize the data interaction from the bottom level to the top level and update the system running results asynchronously in Jupyter notebook. We achieve an average 36.7FPS on Xilinx ZCU104 platform, which illustrates that our method has the important practical benefit of allowing lightweight architectures to achieve good performance at high framerates.\",\"PeriodicalId\":412255,\"journal\":{\"name\":\"2020 6th International Conference on Control, Automation and Robotics (ICCAR)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 6th International Conference on Control, Automation and Robotics (ICCAR)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCAR49639.2020.9108096\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 6th International Conference on Control, Automation and Robotics (ICCAR)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCAR49639.2020.9108096","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Heterogeneous Siamese Tracking System Based on PYNQ Framework
Deep neural network models have been gradually applied to the field of visual tracking due to their excellent feature expression capabilities. However, the model is large, which is expressed in the calculation of model parameters. As a result, the implementation platforms of visual tracking algorithm are usually limited by computing power, power consumption, portability, etc. In this paper, we propose a Siamese network tracking scheme based on PYNQ framework, which is deployed on ZYNQ platform. By optimizing the calculation process, Siamese Network accelerated IP core and Region Proposal Network accelerated IP core are designed. The double buffer structure is adopted to effectively call different feature map calculations and reduce off-chip memory access. Python is used to call the accelerated IP core at the top level as the hardware coprocessor to realize the data interaction from the bottom level to the top level and update the system running results asynchronously in Jupyter notebook. We achieve an average 36.7FPS on Xilinx ZCU104 platform, which illustrates that our method has the important practical benefit of allowing lightweight architectures to achieve good performance at high framerates.