{"title":"探索芯片多处理器的混合NoC架构","authors":"Sirine Mnejja, Y. Aydi, M. Abid","doi":"10.1109/ICM.2018.8704068","DOIUrl":null,"url":null,"abstract":"Since the number of cores incorporated on the same multicore chip increases, the main important challenge for System-on-Chip (SoC) systems is the interconnection between their components. Thus, to deal with the problem of communication that became the bottleneck of conventional NoC, wireless Networks on Chip (WiNoCs) have recently been proposed for Multiprocessor systems on chip (MP-SoCs) interconnection. This paper proposed a mesh based Hybrid architecture Network-on-Chip (NoC), which wired dual support and wireless communications. The whole architecture has been implemented and integrated over Noxim platform. A performance evaluation of this model has been illustrated to analyze the dynamic behavior of the Network.","PeriodicalId":305356,"journal":{"name":"2018 30th International Conference on Microelectronics (ICM)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Exploring Hybrid NoC Architecture for Chip Multiprocessor\",\"authors\":\"Sirine Mnejja, Y. Aydi, M. Abid\",\"doi\":\"10.1109/ICM.2018.8704068\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Since the number of cores incorporated on the same multicore chip increases, the main important challenge for System-on-Chip (SoC) systems is the interconnection between their components. Thus, to deal with the problem of communication that became the bottleneck of conventional NoC, wireless Networks on Chip (WiNoCs) have recently been proposed for Multiprocessor systems on chip (MP-SoCs) interconnection. This paper proposed a mesh based Hybrid architecture Network-on-Chip (NoC), which wired dual support and wireless communications. The whole architecture has been implemented and integrated over Noxim platform. A performance evaluation of this model has been illustrated to analyze the dynamic behavior of the Network.\",\"PeriodicalId\":305356,\"journal\":{\"name\":\"2018 30th International Conference on Microelectronics (ICM)\",\"volume\":\"46 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 30th International Conference on Microelectronics (ICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2018.8704068\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 30th International Conference on Microelectronics (ICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2018.8704068","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Exploring Hybrid NoC Architecture for Chip Multiprocessor
Since the number of cores incorporated on the same multicore chip increases, the main important challenge for System-on-Chip (SoC) systems is the interconnection between their components. Thus, to deal with the problem of communication that became the bottleneck of conventional NoC, wireless Networks on Chip (WiNoCs) have recently been proposed for Multiprocessor systems on chip (MP-SoCs) interconnection. This paper proposed a mesh based Hybrid architecture Network-on-Chip (NoC), which wired dual support and wireless communications. The whole architecture has been implemented and integrated over Noxim platform. A performance evaluation of this model has been illustrated to analyze the dynamic behavior of the Network.