基于数字前景校正算法的超高速模数转换器线性度改进

2010 International Conference on Anti-Counterfeiting, Security and Identification Pub Date : 2010-07-18 DOI:10.1109/ICASID.2010.5551519

RuiTao Zhang, Jinshan Yu, Z. Zhang, Yong-lu Wang, Zhu Can, Yu Zhou

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引用次数: 2

摘要

提出了一种基于0.18鳍CMOS技术的超高速折叠插值模数转换器的数字校准算法。spice仿真结果表明，数字前景校准算法可以有效地改善ADC的线性度。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Linearity improvement base on digital foreground calibration algorithm for a ultra high-speed analog-to-digital converter

In this paper, a digital calibration algorithm for an ultra high-speed folding and interpolating analog-to-digital converter in 0.18-fin CMOS technology is presented. The spice simulation result shows the digital foreground calibration algorithm can efficiently improve the linearity of the ADC.

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2010 International Conference on Anti-Counterfeiting, Security and Identification

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