1 V 88 dB 20 kHz /spl Sigma//spl Delta/ 90 nm CMOS调制器

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519) Pub Date : 2004-09-13 DOI:10.1109/ISSCC.2004.1332603

L. Yao, M. Steyaert, W. Sansen

{"title":"1 V 88 dB 20 kHz /spl Sigma//spl Delta/ 90 nm CMOS调制器","authors":"L. Yao, M. Steyaert, W. Sansen","doi":"10.1109/ISSCC.2004.1332603","DOIUrl":null,"url":null,"abstract":"A third-order single-loop SC /spl Sigma//spl Delta/ modulator is realized in a standard 90 nm digital CMOS technology. The modulator achieves 88 dB dynamic range for a 20 kHz signal bandwidth with an OSR of 100. Power consumption is 140 /spl mu/W from a 1 V supply, and the chip core size is 0.18 mm/sup 2/.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"A 1 V 88 dB 20 kHz /spl Sigma//spl Delta/ modulator in 90 nm CMOS\",\"authors\":\"L. Yao, M. Steyaert, W. Sansen\",\"doi\":\"10.1109/ISSCC.2004.1332603\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A third-order single-loop SC /spl Sigma//spl Delta/ modulator is realized in a standard 90 nm digital CMOS technology. The modulator achieves 88 dB dynamic range for a 20 kHz signal bandwidth with an OSR of 100. Power consumption is 140 /spl mu/W from a 1 V supply, and the chip core size is 0.18 mm/sup 2/.\",\"PeriodicalId\":273317,\"journal\":{\"name\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"volume\":\"91 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2004.1332603\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2004.1332603","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 14

摘要

一个三阶单回路SC /spl Sigma//spl Delta/调制器在标准的90 nm数字CMOS技术上实现。该调制器在20khz信号带宽下实现88db动态范围，OSR为100。在1v电源下，功耗为140 /spl mu/W，芯片核心尺寸为0.18 mm/sup /。

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A 1 V 88 dB 20 kHz /spl Sigma//spl Delta/ modulator in 90 nm CMOS

A third-order single-loop SC /spl Sigma//spl Delta/ modulator is realized in a standard 90 nm digital CMOS technology. The modulator achieves 88 dB dynamic range for a 20 kHz signal bandwidth with an OSR of 100. Power consumption is 140 /spl mu/W from a 1 V supply, and the chip core size is 0.18 mm/sup 2/.

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2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

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