多值逻辑电路的全灵敏度和测试生成

Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94) Pub Date : 1994-05-25 DOI:10.1109/ISMVL.1994.302189

E. Dubrova, D. Gurov, J. Muzio

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引用次数: 6

摘要

介绍了多值逻辑(MVL)电路的全灵敏度概念。使用一个特殊定义的算子，称为互斥，给出了这个概念的形式化。提出了J.B. Rosser和A.R. Turquette(1952)在功能基中完全敏感性的表达。研究了这种函数变换对MVL电路测试生成的有用性。

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Full sensitivity and test generation for multiple-valued logic circuits

The notion of full sensitivity in a multiple-valued logic (MVL) circuit is introduced. A formalization of this notion using a specially defined operator, called mutual exclusion, is given. An expression of full sensitivity in the functional base of J.B. Rosser and A.R. Turquette (1952) is presented. The usefulness of this functional transformation with respect to test generation for MVL circuits is investigated.<>

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Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)

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