{"title":"42mW 26 - 28ghz相控阵接收通道,12 dB增益,4 dB NF和0 dBm IIP3, 45nm CMOS SOI","authors":"Umut Kodak, Gabriel M. Rebeiz","doi":"10.1109/RFIC.2016.7508324","DOIUrl":null,"url":null,"abstract":"This paper presents a low-power 26-28 GHz phased-array receive channel in 45nm CMOS SOI. The design alternates cascode amplifiers with switched-LC phase-shifter cells to result in 5-bit phase control with gain and rms phase error <; 0.6 dB and 4°, respectively, over 32 phase states. The measured gain, noise figure (NF) and IIP3 are 12.2 dB, 4 dB and 0 dBm, respectively, and are achieved at a DC power of 42 mW. A gain control of 6-dB is also available without affecting the system NF. To our knowledge, this represents state-of-the-art in mm-wave phased-arrays with the best published linearity at low NF. Application areas include 5G base-stations and hand-held units.","PeriodicalId":163595,"journal":{"name":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"30","resultStr":"{\"title\":\"A 42mW 26–28 GHz phased-array receive channel with 12 dB gain, 4 dB NF and 0 dBm IIP3 in 45nm CMOS SOI\",\"authors\":\"Umut Kodak, Gabriel M. Rebeiz\",\"doi\":\"10.1109/RFIC.2016.7508324\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a low-power 26-28 GHz phased-array receive channel in 45nm CMOS SOI. The design alternates cascode amplifiers with switched-LC phase-shifter cells to result in 5-bit phase control with gain and rms phase error <; 0.6 dB and 4°, respectively, over 32 phase states. The measured gain, noise figure (NF) and IIP3 are 12.2 dB, 4 dB and 0 dBm, respectively, and are achieved at a DC power of 42 mW. A gain control of 6-dB is also available without affecting the system NF. To our knowledge, this represents state-of-the-art in mm-wave phased-arrays with the best published linearity at low NF. Application areas include 5G base-stations and hand-held units.\",\"PeriodicalId\":163595,\"journal\":{\"name\":\"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"30\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2016.7508324\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2016.7508324","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 42mW 26–28 GHz phased-array receive channel with 12 dB gain, 4 dB NF and 0 dBm IIP3 in 45nm CMOS SOI
This paper presents a low-power 26-28 GHz phased-array receive channel in 45nm CMOS SOI. The design alternates cascode amplifiers with switched-LC phase-shifter cells to result in 5-bit phase control with gain and rms phase error <; 0.6 dB and 4°, respectively, over 32 phase states. The measured gain, noise figure (NF) and IIP3 are 12.2 dB, 4 dB and 0 dBm, respectively, and are achieved at a DC power of 42 mW. A gain control of 6-dB is also available without affecting the system NF. To our knowledge, this represents state-of-the-art in mm-wave phased-arrays with the best published linearity at low NF. Application areas include 5G base-stations and hand-held units.