{"title":"多计算机上分布式帧缓冲区的性能问题","authors":"Bin Wei, D. Clark, E. Felten, Kai Li","doi":"10.1145/285305.285316","DOIUrl":null,"url":null,"abstract":"A multiple-port, distributed frame buffer has been recently proposed to support parallel rendering on multicomputers. This paper describes an implementation of such a distributed frame buffer for the Intel Paragon routing network, and reports its performance results. We have conducted several experiments with the system we have developed. Our results indicate that placing a multipleport, distributed frame buffer directly on the host internal routing network can provide high throughput to eliminate the bottleneck of merging a final image from multiple processors to a frame buffer. This architectural approach can also effectively support image composition for sort-last. The synchronization algorithm we have developed requires only one-way communication and minimizes receive overhead for message passing to the frame buffer. CR Categories: B.4.3 [Input/Output]: Subsystems-Parallel I/O; 1.3.1 [Computer Graphics]: Hardware Architecture-Parallel Processing; C.4 [Performance of Systems]: Design Studies.","PeriodicalId":298241,"journal":{"name":"Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Performance issues of a distributed frame buffer on a multicomputer\",\"authors\":\"Bin Wei, D. Clark, E. Felten, Kai Li\",\"doi\":\"10.1145/285305.285316\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A multiple-port, distributed frame buffer has been recently proposed to support parallel rendering on multicomputers. This paper describes an implementation of such a distributed frame buffer for the Intel Paragon routing network, and reports its performance results. We have conducted several experiments with the system we have developed. Our results indicate that placing a multipleport, distributed frame buffer directly on the host internal routing network can provide high throughput to eliminate the bottleneck of merging a final image from multiple processors to a frame buffer. This architectural approach can also effectively support image composition for sort-last. The synchronization algorithm we have developed requires only one-way communication and minimizes receive overhead for message passing to the frame buffer. CR Categories: B.4.3 [Input/Output]: Subsystems-Parallel I/O; 1.3.1 [Computer Graphics]: Hardware Architecture-Parallel Processing; C.4 [Performance of Systems]: Design Studies.\",\"PeriodicalId\":298241,\"journal\":{\"name\":\"Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/285305.285316\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/285305.285316","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Performance issues of a distributed frame buffer on a multicomputer
A multiple-port, distributed frame buffer has been recently proposed to support parallel rendering on multicomputers. This paper describes an implementation of such a distributed frame buffer for the Intel Paragon routing network, and reports its performance results. We have conducted several experiments with the system we have developed. Our results indicate that placing a multipleport, distributed frame buffer directly on the host internal routing network can provide high throughput to eliminate the bottleneck of merging a final image from multiple processors to a frame buffer. This architectural approach can also effectively support image composition for sort-last. The synchronization algorithm we have developed requires only one-way communication and minimizes receive overhead for message passing to the frame buffer. CR Categories: B.4.3 [Input/Output]: Subsystems-Parallel I/O; 1.3.1 [Computer Graphics]: Hardware Architecture-Parallel Processing; C.4 [Performance of Systems]: Design Studies.